Adam Makosiej

20 papers A 3C 5Journal 2Unranked 10
YearRankTypeTitle / Venue / Authors
2023 J jnl
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration.
CoRR
Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy
2023 J jnl
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration.
IEEE J. Solid State Circuits
Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy
2021 — conf
Energy Efficient Comparator-Less Current-Mode TFET-CMOS Co-Integrated Scalable Flash ADC.
MWSCAS
Navneet Gupta, Hitesh Shrimali, Adam Makosiej, Andrei Vladimirescu, Amara Amara
2020 — conf
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency.
VLSI Circuits
Ivan Miro Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Anthony Quelen, Emmanuel Pluchart, Jean-Philippe Noel, Reda Boumchedda, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Alexandre Valentian, Frédéric Heitzmann, Edith Beigné, Fabien Clermidy
2018 — conf
Energy-Efficient 4T SRAM Bitcell with 2T Read-Port for Ultra-Low-Voltage Operations in 28 nm 3D Monolithic CoolCubeTM Technology.
NANOARCH
Reda Boumchedda, Jean-Philippe Noel, Bastien Giraud, Adam Makosiej, Marco Antonio Rios, Eduardo Esmanhotto, Emilien Bourde-Cicé, Mathis Bellet, David Turgis, Edith Beigné
2017 — conf
1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcell.
ESSCIRC
Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel
2017 A conf
Tunnel FET based refresh-free-DRAM.
DATE
Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel
2017 — conf
Tunnel FET based ultra-low-leakage compact 2T1C SRAM.
ISQED
Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel
2016 — conf
16Kb hybrid TFET/CMOS reconfigurable CAM/SRAM array based on 9T-TFET bitcell.
ESSDERC
Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel
2016 A conf
3T-TFET bitcell based TFET-CMOS hybrid SRAM design for Ultra-Low Power applications.
DATE
Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel
2016 — conf
TFET NDR skewed inverter based sensing method.
NANOARCH
Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Sorin Cotofana, Costin Anghel
2016 — conf
Ultra-Low-Power compact TFET Flip-Flop design for high-performance low-voltage applications.
ISQED
Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel
2016 C conf
Ultra-compact SRAM design using TFETs for low power low voltage applications.
ISCAS
Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel
2015 — conf
Sub-picowatt retention mode TFET memory for CMOS sensor processing nodes.
IWASI
Andrei Vladimirescu, Costin Anghel, Amara Amara, Navneet Gupta, Adam Makosiej
2015 C conf
Ultra-low leakage sub-32nm TFET/CMOS hybrid 32kb pseudo DualPort scratchpad with GHz speed for embedded applications.
ISCAS
Navneet Gupta, Adam Makosiej, Oliver Thomas, Amara Amara, Andrei Vladimirescu, Costin Anghel
2013 C conf
CMOS SRAM scaling limits under optimum stability constraints.
ISCAS
Adam Makosiej, Olivier Thomas, Amara Amara, Andrei Vladimirescu
2012 C conf
A 32nm tunnel FET SRAM for ultra low leakage.
ISCAS
Adam Makosiej, Rutwick Kumar Kashyap, Andrei Vladimirescu, Amara Amara, Costin Anghel
2012 A conf
Stability and yield-oriented ultra-low-power embedded 6T SRAM cell design optimization.
DATE
Adam Makosiej, Olivier Thomas, Andrei Vladimirescu, Amara Amara
2009 C conf
SRAM Voltage and Current Sense Amplifiers in sub-32nm Double-gate CMOS Insensitive to Process Variations and Transistor Mismatch.
ISCAS
Piotr Nasalski, Adam Makosiej, Bastien Giraud, Andrei Vladimirescu, Amara Amara
2008 — conf
An innovative sub-32nm SRAM voltage sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatch.
ICECS
Piotr Nasalski, Adam Makosiej, Bastien Giraud, Andrei Vladimirescu, Amara Amara