Ad J. van de Goor

130 papers A* 1A 35B 1C 5Misc 12Journal 34Unranked 41

Year	Rank	Type	Title / Venue / Authors
2011	A	`conf`	Generic, orthogonal and low-cost March Element based memory BIST. ITC Ad J. van de Goor, Said Hamdioui, Halil Kukner
2010	C	`conf`	Advanced embedded memory testing: Reducing the defect per million level at lower test cost. DDECS Said Hamdioui, Ad J. van de Goor
2010	C	`conf`	Low-cost, customized and flexible SRAM MBIST engine. DDECS Ad J. van de Goor, Christian Jung, Said Hamdioui, Georgi Gaydadjiev
2010	—	`conf`	MBIST architecture framework based on orthogonal constructs. IDT Ad J. van de Goor, Said Hamdioui
2010	A	`conf`	Memory testing with a RISC microcontroller. DATE Ad J. van de Goor, Georgi Gaydadjiev, Said Hamdioui
2010	C	`conf`	Using a CISC microcontroller to test embedded memories. DDECS Ad J. van de Goor, Said Hamdioui, Georgi Gaydadjiev
2009	—	`conf`	New Algorithms for Address Decoder Delay Faults and Bit Line Imbalance Faults. Asian Test Symposium Ad J. van de Goor, Said Hamdioui, Georgi Nedeltchev Gaydadjiev, Zaid Al-Ars
2008	A	`conf`	Defect Oriented Testing of the Strap Problem Under Process Variations in DRAMs. ITC Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor, Georg Mueller
2006	A	`conf`	DRAM-Specific Space of Memory Tests. ITC Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor, Georgi Gaydadjiev, Jörg E. Vollrath
2006	J	`jnl`	Influence of Bit-Line Coupling and Twisting on the Faulty Behavior of DRAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor, Sultan M. Al-Harbi
2006	J	`jnl`	Opens and Delay Faults in CMOS RAM Address Decoders. IEEE Trans. Computers Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor
2006	A	`conf`	Space of DRAM fault models and corresponding testing. DATE Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor
2005	A	`conf`	Framework for Fault Analysis and Test Generation in DRAMs. DATE Zaid Al-Ars, Said Hamdioui, Georg Mueller, Ad J. van de Goor
2005	—	`conf`	Impact of stresses on the fault coverage of memory tests. MTDT Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor, Rob Wadsworth
2004	J	`jnl`	An Industrial Evaluation of DRAM Tests. IEEE Des. Test Comput. Ad J. van de Goor
2004	A	`conf`	Detecting Faults in the Peripheral Circuits and an Evaluation of SRAM Tests. ITC Ad J. van de Goor, Said Hamdioui, Rob Wadsworth
2004	Misc	`conf`	Effects of Bit Line Coupling on the Faulty Behavior of DRAMs. VTS Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor
2004	—	`conf`	Influence of Bit Line Twisting on the Faulty Behavior of DRAMs. MTDT Zaid Al-Ars, Martin Herzog, Ivo Schanstra, Ad J. van de Goor
2004	J	`jnl`	Linked faults in random access memories: concept, fault models, test algorithms, and industrial results. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor, Mike Rodgers
2004	J	`jnl`	Memory Fault Modeling Trends: A Case Study. J. Electron. Test. Said Hamdioui, Rob Wadsworth, John Delos Reyes, Ad J. van de Goor
2004	A	`conf`	Soft Faults and the Importance of Stresses in Memory Testing. DATE Zaid Al-Ars, Ad J. van de Goor
2004	B	`conf`	Tests for address decoder delay faults in RAMs due to inter-gate opens. ETS Ad J. van de Goor, Said Hamdioui, Zaid Al-Ars
2004	—	`conf`	The Effectiveness of the Scan Test and Its New Variants. MTDT Ad J. van de Goor, Said Hamdioui, Zaid Al-Ars
2004	—	`conf`	The State-of-Art and Future Trends in Testing Embedded Memories. MTDT Said Hamdioui, Georgi Gaydadjiev, Ad J. van de Goor
2003	—	`conf`	A Fault Primitive Based Analysis of Linked Faults in RAMs. MTDT Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor
2003	J	`jnl`	A Systematic Method for Modifying March Tests for Bit-Oriented Memories into Tests for Word-Oriented Memories. IEEE Trans. Computers Ad J. van de Goor, Issam B. S. Tlili
2003	—	`conf`	Analyzing the Impact of Process Variations on DRAM Testing Using Border Resistance Traces. Asian Test Symposium Zaid Al-Ars, Ad J. van de Goor
2003	A	`conf`	Consequences of RAM Bitline Twisting for Test Coverage. DATE Ivo Schanstra, Ad J. van de Goor
2003	Misc	`conf`	Detecting Intra-Word Faults in Word-Oriented Memories. VTS Said Hamdioui, Ad J. van de Goor, Mike Rodgers
2003	J	`jnl`	Dynamic Faults in Random-Access-Memories: Concept, Fault Models and Tests. J. Electron. Test. Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor, Mike Rodgers
2003	—	`conf`	Importance of dynamic faults for new SRAM technologies. ETW Said Hamdioui, Rob Wadsworth, John Delos Reyes, Ad J. van de Goor
2003	—	`conf`	March SL: A Test For All Static Linked Memory Faults. Asian Test Symposium Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor, Mike Rodgers
2003	A	`conf`	Optimizing Stresses for Testing DRAM Cell Defects Using Electrical Simulation. DATE Zaid Al-Ars, Ad J. van de Goor, Jens Braun, Detlev Richter
2003	J	`jnl`	Static and Dynamic Behavior of Memory Cell Array Spot Defects in Embedded DRAMs. IEEE Trans. Computers Zaid Al-Ars, Ad J. van de Goor
2003	—	`conf`	Systematic Memory Test Generation for DRAM Defects Causing Two Floating Nodes. MTDT Zaid Al-Ars, Ad J. van de Goor
2003	—	`conf`	TPI for improving PR fault coverage of Boolean and three-state circuits. ETW M. J. Geuzebroek, Ad J. van de Goor
2003	J	`jnl`	Test generation and optimization for DRAM cell defects using electrical simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zaid Al-Ars, Ad J. van de Goor
2002	—	`conf`	Address and Data Scrambling: Causes and Impact on Memory Tests. DELTA Ad J. van de Goor, Ivo Schanstra
2002	Misc	`conf`	Approximating Infinite Dynamic Behavior for DRAM Cell Defects. VTS Zaid Al-Ars, Ad J. van de Goor
2002	—	`conf`	DRAM Specific Approximation of the Faulty Behavior of Cell Defects. Asian Test Symposium Zaid Al-Ars, Ad J. van de Goor
2002	J	`jnl`	Efficient Tests for Realistic Faults in Dual-Port SRAMs. IEEE Trans. Computers Said Hamdioui, Ad J. van de Goor
2002	—	`conf`	March SS: A Test for All Static Simple RAM Faults. MTDT Said Hamdioui, Ad J. van de Goor, Mike Rodgers
2002	A	`conf`	Minimal Test for Coupling Faults in Word-Oriented Memories. DATE Ad J. van de Goor, Magdy S. Abadir, Alan Carlin
2002	A	`conf`	Modeling Techniques and Tests for Partial Faults in Memory Devices. DATE Zaid Al-Ars, Ad J. van de Goor
2002	A	`conf`	Test Point Insertion that Facilitates ATPG in Reducing Test Time and Data Volume. ITC M. J. Geuzebroek, J. Th. van der Linden, Ad J. van de Goor
2002	Misc	`conf`	Testing Static and Dynamic Faults in Random Access Memories. VTS Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor
2002	J	`jnl`	Thorough testing of any multiport memory with linear tests. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Said Hamdioui, Ad J. van de Goor
2001	—	`conf`	A Memory Specific Notation for Fault Modeling. Asian Test Symposium Zaid Al-Ars, Ad J. van de Goor, Jens Braun, Detlev Richter
2001	—	`conf`	Detecting Unique Faults in Multi-port SRAMs. Asian Test Symposium Said Hamdioui, Ad J. van de Goor, David Eastwick, Mike Rodgers
2001	—	`conf`	Realistic Fault Models and Test Procedures for Multi-Port SRAMs. MTDT Said Hamdioui, Ad J. van de Goor, David Eastwick, Mike Rodgers
2001	—	`conf`	Simulation and Development of Short Transparent Tests for RAM. Asian Test Symposium Serge N. Demidenko, Ad J. van de Goor, S. Henderson, P. Knoppers
2001	A	`conf`	Simulation based analysis of temperature effect on the faulty behavior of embedded DRAMs. ITC Zaid Al-Ars, Ad J. van de Goor, Jens Braun, Detlev Richter
2001	A	`conf`	Static and dynamic behavior of memory cell array opens and shorts in embedded DRAMs. DATE Zaid Al-Ars, Ad J. van de Goor
2001	—	`conf`	Tests for Resistive and Capacitive Defects in Address Decoders. Asian Test Symposium Matthias Klaus, Ad J. van de Goor
2001	—	`conf`	Transient Faults in DRAMs: Concepts, Analysis and Impact on Tests. MTDT Zaid Al-Ars, Ad J. van de Goor
2000	—	`conf`	An experimental analysis of spot defects in SRAMs: realistic fault models and tests. Asian Test Symposium Said Hamdioui, Ad J. van de Goor
2000	Misc	`conf`	Functional Memory Faults: A Formal Notation and a Taxonomy. VTS Ad J. van de Goor, Zaid Al-Ars
2000	—	`conf`	Impact of memory cell array bridges on the faulty behavior in embedded DRAMs. Asian Test Symposium Zaid Al-Ars, Ad J. van de Goor
2000	A	`conf`	Industrial evaluation of DRAM SIMM tests. ITC Ad J. van de Goor, A. Paalvast
2000	—	`conf`	March Tests for Realistic Faults in Two-Port Memories. MTDT Said Hamdioui, Ad J. van de Goor, Mike Rodgers, David Eastwick
2000	A	`conf`	Test point insertion for compact test sets. ITC M. J. Geuzebroek, J. Th. van der Linden, Ad J. van de Goor
2000	J	`jnl`	Testing Address Decoder Faults in Two-Port Memories: Fault Models, Tests, Consequences of Port Restrictions, and Test Strategy. J. Electron. Test. Said Hamdioui, Ad J. van de Goor
1999	—	`conf`	Defining SRAM Resistive Defects and Their Simulation Stimuli. Asian Test Symposium Ad J. van de Goor, J. E. Simonse
1999	—	`conf`	Designing a Memory Module Tester. MTDT Daniel P. Van der Velde, Ad J. van de Goor
1999	—	`conf`	Fault (In)Dependent Cost Estimates and Conflict-Directed Backtracking to Guide Sequential Circuit Test Generation. Asian Test Symposium M. H. Konijnenburg, Hans van der Linden, Ad J. van de Goor
1999	A	`conf`	Illegal State Space Identification for Sequential Circuit Test Generation. DATE M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor
1999	A	`conf`	Industrial Evaluation of DRAM Tests. DATE Ad J. van de Goor, J. de Neef
1999	A	`conf`	Industrial evaluation of stress combinations for march tests applied to SRAMs. ITC Ad J. van de Goor, Ivo Schanstra
1999	—	`conf`	March Tests for Word-Oriented Two-Port Memories. Asian Test Symposium Said Hamdioui, Ad J. van de Goor
1999	A	`conf`	Port interference faults in two-port memories. ITC Said Hamdioui, Ad J. van de Goor
1999	A	`conf`	Testability of the Philips 80C51 micro-controller. ITC M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor
1998	—	`conf`	Answers to the Key Issues. Asian Test Symposium Ad J. van de Goor
1998	J	`jnl`	Automatic fault localization at chip level. Microprocess. Microsystems R. D. L. Stout, Ad J. van de Goor, R. E. Wolff
1998	—	`conf`	Complete Search in Test Generation for Industrial Circuits with Improved Bus-Conflict Detection. Asian Test Symposium J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor
1998	—	`conf`	Consequences of Port Restriction on Testing Address Decoders in Two-Port Memories. Asian Test Symposium Said Hamdioui, Ad J. van de Goor
1998	A	`conf`	Consequences of port restrictions on testing two-port memories. ITC Said Hamdioui, Ad J. van de Goor
1998	Misc	`conf`	Fault Models and Tests for Two-Port Memories. VTS Ad J. van de Goor, Said Hamdioui
1998	A	`conf`	March Tests for Word-Oriented Memories. DATE Ad J. van de Goor, Issam B. S. Tlili
1998	A	`conf`	Semiconductor manufacturing process monitoring using built-in self-test for embedded memories. ITC Ivo Schanstra, Dharmajaya Lukita, Ad J. van de Goor, Kees Veelenturf, Paul J. van Wijnen
1997	Misc	`conf`	Disturb Neighborhood Pattern Sensitive Fault. VTS Ad J. van de Goor, Issam B. S. Tlili
1997	—	`conf`	March LA: a test for linked memory faults. ED&TC Ad J. van de Goor, Georgi Gaydadjiev, Vyacheslav N. Yarmolik, V. G. Mikitjuk
1997	A	`conf`	Sequential Test Generation with Advanced Illegal State Search. ITC M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor
1997	A	`conf`	The Implementation of Pseudo-Random Memory Tests on Commercial Memory Testers. ITC Ad J. van de Goor, Mike Lin
1996	A	`conf`	Accelerated Compact Test Set Generation for Three-State Circuits. ITC M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor
1996	—	`conf`	Circuit Partitioned Automatic Test Pattern Generation Constrained by Three-State Buses and Restrictors. Asian Test Symposium J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor
1996	Misc	`conf`	March LR: a test for realistic linked faults. VTS Ad J. van de Goor, Georgi Gaydadjiev, V. G. Mikitjuk, Vyacheslav N. Yarmolik
1996	—	`conf`	RAM Testing Algorithm for Detection Linked Coupling Faults. ED&TC V. G. Mikitjuk, V. N. Yarmolik, Ad J. van de Goor
1996	—	`conf`	Realistic Linked Memory Cell Array Faults. Asian Test Symposium Ad J. van de Goor, Georgi Gaydadjiev
1996	—	`conf`	Towards a Uniform Notation for Memory Tests. ED&TC Ad J. van de Goor, Aad Offerman, Ivo Schanstra
1995	Misc	`conf`	Compact test sets for industrial circuits. VTS M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor
1995	A	`conf`	Coping with Re-usability Using Sequential ATPG: A Practical Case Study. ITC Jos van Sas, Erik Huyskens, Hans Naert, Fred Schell, Ad J. van de Goor
1995	—	`conf`	Functional test for shifting-type FIFOs. ED&TC Ad J. van de Goor, Ivo Schanstra, Yervant Zorian
1995	—	`conf`	Pseudo-exhaustive word-oriented DRAM testing. ED&TC Mark G. Karpovsky, Ad J. van de Goor, V. N. Yarmolik
1994	C	`conf`	A 16x16-bit Static CMOS Wave-Pipelined Multiplier. ISCAS Fabian Klass, Michael J. Flynn, Ad J. van de Goor
1994	A	`conf`	An Effective BIST Scheme for Ring-Address Type FIFOs. ITC Yervant Zorian, Ad J. van de Goor, Ivo Schanstra
1994	Misc	`conf`	Automating the verification of memory tests. VTS Ad J. van de Goor, B. Smit
1994	J	`jnl`	Effective march algorithms for testing single-order addressed memories. J. Electron. Test. Ad J. van de Goor, Yervant Zorian
1994	J	`jnl`	Fast multiplication in VLSI using wave pipelining techniques. J. VLSI Signal Process. Fabian Klass, Michael J. Flynn, Ad J. van de Goor
1994	Misc	`conf`	Fault models and tests for Ring Address Type FIFOs. VTS Ad J. van de Goor, Ivo Schanstra, Yervant Zorian
1994	—	`conf`	Functional Tests for Ring-Address SRAM-type FIFOs. EDAC-ETC-EUROASIC Ad J. van de Goor, Yervant Zorian, Ivo Schanstra
1994	A	`conf`	Generating March Tests Automatically. ITC Ad J. van de Goor, B. Smit
1994	A	`conf`	Parallel Pattern Fast Fault Simulation for Three-State Circuits and Bidirectional I/O. ITC J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor
1994	Misc	`conf`	Test generation and three-state elements, buses, and bidirectionals. VTS J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor
1993	A	`conf`	Test Pattern Generation with Restrictors. ITC M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor
1993	J	`jnl`	Using March Tests to Test SRAMs. IEEE Des. Test Comput. Ad J. van de Goor
1992	A	`conf`	Functional Testing of Current Microprocessors (applied to the Intel i860 ITC Ad J. van de Goor, Th. J. W. Verhallen
1991	J	`jnl`	A low-cost tester for boundary scan. Microprocess. Microsystems Ad J. van de Goor, J. A. M. van Tetering
1991	A	`conf`	Locating Bridging Faults in Memory Arrays. ITC Ad J. van de Goor, P. C. M. van der Arend, Gert-Jan Tromp
1991	C	`conf`	Logic Synthesis of 100-percent Testable Logic Networks. ICCD Gert-Jan Tromp, Ad J. van de Goor
1991	—	`conf`	Truth Table Verification for one-Dimensional CMOS ILA's. Fault-Tolerant Computing Systems Vlad. Hert, Ad J. van de Goor
1990	J	`jnl`	An Overview of Deterministic Functional RAM Chip Testing. ACM Comput. Surv. Ad J. van de Goor, C. A. Verruijt
1990	J	`jnl`	Self test for the Intel 8085. Microprocessing and Microprogramming Ad J. van de Goor, O. Jansen
1990	J	`jnl`	Special architecture for high-performance scan conversion. Microprocessing and Microprogramming P. B. Franken, Ad J. van de Goor
1990	J	`jnl`	The Delft test system. Microprocessing and Microprogramming P. P. Meiler, Ad J. van de Goor
1989	—	`book`	Computer architecture and design. Ad J. van de Goor
1989	A*	`conf`	DOAS: an object oriented architecture supporting secure languages. MICRO Ad J. van de Goor, Henk Corporaal
1989	J	`jnl`	TLS: a system for building and controlling transputer networks. Microprocessing and Microprogramming M. A. van Peursem, P. Knoppers, Ad J. van de Goor
1988	J	`jnl`	Software transparent cache consistency scheme for a VMEbus-based system. Microprocess. Microsystems Reinder J. Bril, Ad J. van de Goor
1988	J	`jnl`	Speech synthesis system with unlimited vocabulary for the Dutch language. Microprocess. Microprogramming Ad J. van de Goor, G. J. Nanninga
1988	J	`jnl`	Test Pattern Generation for API Faults in RAM. IEEE Trans. Computers Petra De Jong, Ad J. van de Goor
1988	J	`jnl`	Transputer network with flexible topology. Microprocess. Microprogramming P. Knoppers, Ad J. van de Goor, O. M. Gunhildsbu, P. Stravers
1988	—	`conf`	UNIX I/O in a Multiprocessor System. USENIX Winter Ad J. van de Goor, A. Moolenaar
1987	J	`jnl`	Amore Address Mapping with Overlapped Rotating Entries. IEEE Micro G. J. Dekker, Ad J. van de Goor
1987	J	`jnl`	Multiprocessing memory subsystem. Microprocess. Microsystems Ad J. van de Goor, A. C. van Wijngaarden
1987	J	`jnl`	Using the page mode of dynamic RAMs to obtain a pseudo cache. Microprocess. Microsystems T. A. Peelen, Ad J. van de Goor
1986	J	`jnl`	Adapting UNIX for a Multiprocessor Environment. Commun. ACM M. D. Janssens, J. K. Annot, Ad J. van de Goor
1986	J	`jnl`	Comments on Morris's Starvation-Free Solution to the Mutual Exclusion Problem. Inf. Process. Lett. J. K. Annot, M. D. Janssens, Ad J. van de Goor
1984	J	`jnl`	Effects of technical developments on system security. Comput. Secur. Ad J. van de Goor
1969	J	`jnl`	A Control Unit for a DEC PDP-8 Computer and a Burroughs Disk. IEEE Trans. Computers Ad J. van de Goor, C. Gordon Bell
1969	J	`jnl`	Design and Behavior of TSS/8: a PDP-8 Based Time-Sharing System. IEEE Trans. Computers Ad J. van de Goor, C. Gordon Bell, Donald A. Witcraft