Abusaleh M. Jabir

52 papers A 2C 11Misc 2Journal 14Unranked 22

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A low overhead chemical measurement architecture with memristive sensors. Integr. Meenakshi Devi, Saurabh Khandelwal, Marek Vidis, Tomas Plecenik, Abusaleh M. Jabir
2024	—	`conf`	A Novel Digitisation Method for Pulse Switchable Memristive Chemical Sensors. DFT Meenakshi Devi, Saurabh Khandelwal, Marek Vidis, Tomas Plecenik, Abusaleh M. Jabir
2024	—	`conf`	An AI-Assisted Connection Weight Prediction for Regression Testing of Integrated Circuits. DFT Abishaan Ravikumar, Xiaohan Yang, Rajendra Prasad, RajaNataraj Sivaraj, Alexander Rast, Abusaleh M. Jabir
2022	C	`conf`	Yield Evaluation of Faulty Memristive Crossbar Array-based Neural Networks with Repairability. IOLTS Anu Bala, Saurabh Khandelwal, Abusaleh M. Jabir, Marco Ottavi
2021	C	`conf`	A Memristive Architecture for Process Variation Aware Gas Sensing and Logic Operations. IOLTS Saurabh Khandelwal, Marco Ottavi, Eugenio Martinelli, Abusaleh M. Jabir
2021	—	`conf`	Reliability Assessment of Memristor based Gas Sensor Array. DFT Vishal Gupta, Giulio Panunzi, Saurabh Khandelwal, Eugenio Martinelli, Abusaleh M. Jabir, Marco Ottavi
2020	—	`conf`	A Modelling Attack Resistant Low Overhead Memristive Physical Unclonable Function. DFT Xiaohan Yang, Saurabh Khandelwal, Aiqi Jiang, Abusaleh M. Jabir
2020	—	`conf`	Sensing with Memristive Complementary Resistive Switch: Modelling and Simulations. DFT Vishal Gupta, Danilo Pellegrini, Saurabh Khandelwal, Abusaleh M. Jabir, Shahar Kvatinsky, Eugenio Martinelli, Corrado Di Natale, Marco Ottavi
2020	C	`conf`	Yield Estimation of a Memristive Sensor Array. IOLTS Vishal Gupta, Saurabh Khandelwal, Giulio Panunzi, Eugenio Martinelli, Said Hamdioui, Abusaleh M. Jabir, Marco Ottavi
2019	J	`jnl`	Efficient and Low Overhead Memristive Activation Circuit for Deep Learning Neural Networks. J. Low Power Electron. Anu Bala, Xiaohan Yang, Adedotun Adeyemo, Abusaleh M. Jabir
2019	C	`conf`	Fault Modeling and Simulation of Memristor based Gas Sensors. IOLTS Saurabh Khandelwal, Anu Bala, Vishal Gupta, Marco Ottavi, Eugenio Martinelli, Abusaleh M. Jabir
2019	J	`jnl`	Novel techniques for memristive multifunction logic design. Integr. Xiaohan Yang, Adedotun Adeyemo, Anu Bala, Abusaleh M. Jabir
2019	C	`conf`	The Missing Applications Found: Robust Design Techniques and Novel Uses of Memristors. IOLTS Marco Ottavi, Vishal Gupta, Saurabh Khandelwal, Shahar Kvatinsky, Jimson Mathew, Eugenio Martinelli, Abusaleh M. Jabir
2018	—	`conf`	A Memristive Activation Circuit for Deep Learning Neural Networks. ISED Anu Bala, Xiaohan Yang, Adedotun Adeyemo, Abusaleh M. Jabir
2017	—	`conf`	Learning method for ex-situ training of memristor crossbar based multi-layer neural network. ICUMT Anu Bala, Adedotun Adeyemo, Xiaohan Yang, Abusaleh M. Jabir
2017	J	`jnl`	Minimising Impact of Wire Resistance in Low-Power Crossbar Array Write Scheme. J. Low Power Electron. Adedotun Adeyemo, Abusaleh M. Jabir, Jimson Mathew
2017	—	`conf`	Parasitic effects on memristive logic architecture. PATMOS Xiaohan Yang, Adedotun Adeyemo, Anu Bala, Abusaleh M. Jabir
2017	C	`conf`	Reliable gas sensing with memristive array. IOLTS Adedotun Adeyemo, Abusaleh M. Jabir, Jimson Mathew, Eugenio Martinelli, Corrado Di Natale, Marco Ottavi
2016	C	`conf`	Analytic models for crossbar read operation. IOLTS Adedotun Adeyemo, Xiaohan Yang, Anu Bala, Jimson Mathew, Abusaleh M. Jabir
2016	—	`conf`	Analytic models for crossbar write operation. ISED Adedotun Adeyemo, Xiaohan Yang, Anu Bala, Abusaleh M. Jabir
2016	—	`conf`	High level abstraction of memristor model for neural network simulation. ISED Anu Bala, Adedotun Adeyemo, Xiaohan Yang, Abusaleh M. Jabir
2016	—	`conf`	Novel memristive logic architectures. PATMOS Xiaohan Yang, Adedotun Adeyemo, Anu Bala, Abusaleh M. Jabir
2015	J	`jnl`	A Low-Complexity Multiple Error Correcting Architecture Using Novel Cross Parity Codes Over GF(2 IEEE Trans. Very Large Scale Integr. Syst. Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2015	—	`conf`	Exploring error-tolerant low-power multiple-output read scheme for memristor-based memory arrays. DFTS Adedotun A. Adeyemo, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2014	—	`conf`	Write scheme for multiple Complementary Resistive Switch (CRS) cells. PATMOS Adedotun Adeyemo, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2013	J	`jnl`	Attack tolerant cryptographic hardware design by combining error correction and uniform switching activity. Comput. Electr. Eng. Jimson Mathew, Saraju P. Mohanty, Shibaji Banerjee, Dhiraj K. Pradhan, Abusaleh M. Jabir
2012	—	`conf`	An Investigation of Concurrent Error Detection over Binary Galois Fields in CNTFET and QCA Technologies. ISVLSI Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Saraju P. Mohanty
2012	—	`conf`	Low complexity cross parity codes for multiple and random bit error correction. ISQED Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Saraju P. Mohanty
2012	—	`conf`	VLSI Architecture for Bit Parallel Systolic Multipliers for Special Class of GF(2 m )Using Dual Bases. VDAT Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2011	—	`conf`	A dynamically error correctable bit parallel Montgomery multiplier over binary extension fields. ECCTD Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2011	—	`conf`	BCH code based multiple bit error correction in finite field multiplier circuits. ISQED Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan, Saraju P. Mohanty
2010	J	`jnl`	A Galois field-based logic synthesis with testability. IET Comput. Digit. Tech. Jimson Mathew, Abusaleh M. Jabir, Ashutosh Kumar Singh, Hafizur Rahaman, Dhiraj K. Pradhan
2010	—	`conf`	On the design of different concurrent EDC schemes for S-Box and GF(p). ISQED Jimson Mathew, Hafizur Rahaman, Abusaleh M. Jabir, Saraju P. Mohanty, Dhiraj K. Pradhan
2010	C	`conf`	On the synthesis of attack tolerant cryptographic hardware. VLSI-SoC Jimson Mathew, Savita Banerjee, Hafizur Rahaman, Dhiraj K. Pradhan, Saraju P. Mohanty, Abusaleh M. Jabir
2010	J	`jnl`	Simplified bit parallel systolic multipliers for special class of galois field (2 IET Comput. Digit. Tech. Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2009	C	`conf`	C-testable S-box implementation for secure advanced encryption standard. IOLTS Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2009	J	`jnl`	Single error correctable bit parallel multipliers over GF(2 IET Comput. Digit. Tech. Jimson Mathew, Abusaleh M. Jabir, Hafizur Rahaman, Dhiraj K. Pradhan
2008	Misc	`conf`	A Galois Field Based Logic Synthesis Approach with Testability. VLSI Design Jimson Mathew, Hafizur Rahaman, Ashutosh Kumar Singh, Abusaleh M. Jabir, Dhiraj K. Pradhan
2008	J	`jnl`	C-testable bit parallel multipliers over ACM Trans. Design Autom. Electr. Syst. Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan, Abusaleh M. Jabir
2008	J	`jnl`	Derivation of Reduced Test Vectors for Bit-Parallel Multipliers over GF(2^m). IEEE Trans. Computers Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan, Abusaleh M. Jabir
2008	C	`conf`	Design Techniques for Bit-Parallel Galois Field Multipliers with On-Line Single Error Correction and Double Error Detection. IOLTS Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2008	C	`conf`	Fault tolerant bit parallel finite field multipliers using LDPC codes. ISCAS Jimson Mathew, Jawar Singh, Abusaleh M. Jabir, Mohammad Hosseinabady, Dhiraj K. Pradhan
2008	J	`jnl`	GfXpress: A Technique for Synthesis and Optimization of GF(2 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Abusaleh M. Jabir, Dhiraj K. Pradhan, Jimson Mathew
2008	Misc	`conf`	Single Error Correcting Finite Field Multipliers Over GF(2m). VLSI Design Jimson Mathew, Costas Argyrides, Abusaleh M. Jabir, Hafizur Rahaman, Dhiraj K. Pradhan
2007	J	`jnl`	A Graph-Based Unified Technique for Computing and Representing Coefficients over Finite Fields. IEEE Trans. Computers Abusaleh M. Jabir, Dhiraj K. Pradhan
2007	J	`jnl`	A Technique for Representing Multiple Output Binary Functions with Applications to Verification and Simulation. IEEE Trans. Computers Abusaleh M. Jabir, Dhiraj K. Pradhan, T. L. Rajaprabhu, Ashutosh Kumar Singh
2006	A	`conf`	An efficient technique for synthesis and optimization of polynomials in GF(2 ICCAD Abusaleh M. Jabir, Dhiraj K. Pradhan, Jimson Mathew
2006	—	`conf`	Easily Testable Implementation for Bit Parallel Multipliers in GF (2m). HLDVT Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2005	—	`conf`	GASIM: a fast Galois field based simulator for functional model. HLDVT Dhiraj K. Pradhan, Ashutosh Kumar Singh, T. L. Rajaprabhu, Abusaleh M. Jabir
2004	—	`conf`	MODD for CF: a representation for fast evaluation of multiple-output functions. HLDVT T. L. Rajaprabhu, Ashutosh Kumar Singh, Abusaleh M. Jabir, Dhiraj K. Pradhan
2004	A	`conf`	MODD: A New Decision Diagram and Representation for Multiple Output Binary Functions. DATE Abusaleh M. Jabir, Dhiraj K. Pradhan
2001	—	`—`	Logic minimization algorithms for three-level AND-OR-EXOR representations. Abusaleh M. Jabir