| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2025 | C | conf |
DSD
|
| 2025 | — | conf |
CCMCC
|
| 2025 | — | conf |
ISMVL
|
| 2025 | C | conf |
FDL
|
| 2025 | C | conf |
DDECS
|
| 2025 | — | conf |
ISVLSI
|
| 2025 | J | jnl |
ACM J. Emerg. Technol. Comput. Syst.
|
| 2024 | A | conf |
DATE
|
| 2024 | — | conf |
ISVLSI
|
| 2024 | A | conf |
DATE
|
| 2024 | J | jnl |
ACM J. Emerg. Technol. Comput. Syst.
|
| 2024 | — | conf |
ACM Great Lakes Symposium on VLSI
|
| 2024 | — | conf |
SOCC
|
| 2024 | Misc | conf |
VLSID
|
| 2024 | C | conf |
RC
|
| 2024 | — | conf |
ATS
|
| 2024 | J | jnl |
CoRR
|
| 2023 | C | conf |
RC
|
| 2023 | A | conf |
DATE
|
| 2023 | J | jnl |
it Inf. Technol.
|
| 2023 | C | conf |
RC
|
| 2023 | — | conf |
NEWCAS
|
| 2022 | — | conf |
GI-Jahrestagung
|
| 2022 | — | conf |
ISMVL
|
| 2022 | C | conf |
SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library.
DSD
|
| 2020 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2018 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2017 | C | conf |
RC
|
| 2017 | — | conf |
ISMVL
|
| 2017 | C | conf |
RC
|
| 2017 | Misc | conf |
VLSID
|
| 2017 | C | conf |
RC
|
| 2016 | J | jnl |
IEEE J. Emerg. Sel. Topics Circuits Syst.
|
| 2015 | C | conf |
RC
|