Abhishek Bandyopadhyay

21 papers Journal 6Unranked 14
YearRankTypeTitle / Venue / Authors
2022 — conf
Common-mode Stable Multilevel Output Stage with EMI Reduction Feedback Loop for Class-D audio Amplifier.
VLSI Technology and Circuits
Naoaki Nishimura, Atsushi Matamura, Preston Birdsong, Shaolong Liu, Abhishek Bandyopadhyay, Mariana T. Markova, Rajeev Morajkar
2021 — conf
31.1 An 82mW ΔΣ - Based Filter-Less Class-D Headphone Amplifier with -93dB THD+N, 113dB SNR and 93% Efficiency.
ISSCC
Atsushi Matamura, Naoaki Nishimura, Preston Birdsong, Abhishek Bandyopadhyay, Adam Spirer, Mariana T. Markova, Shaolong Liu
2021 J jnl
An 82-mW ΔΣ-Based Filter-Less Class-D Headphone Amplifier With -93-dB THD+N, 113-dB SNR, and 93% Efficiency.
IEEE J. Solid State Circuits
Atsushi Matamura, Naoaki Nishimura, Preston Birdsong, Abhishek Bandyopadhyay, Adam Spirer, Mariana T. Markova, Shaolong Liu
2019 J jnl
An offline scheme for reducing cost of protection in all-optical WDM mesh networks with fast recovery.
Int. J. Parallel Emergent Distributed Syst.
Vishal Dey, Abhishek Bandyopadhyay, Uma Bhattacharya, Monish Chatterjee
2015 — conf
Session 18 - Data converter techniques.
CICC
John A. McNeill, Abhishek Bandyopadhyay
2014 — conf
A 97.3 dB SNR, 600 kHz BW, 31mW multibit continuous time ΔΣ ADC.
VLSIC
Abhishek Bandyopadhyay, Robert Adams, Khiem Nguyen, Paul Baginski, David Lamb, Thomas Tansley
2014 — conf
Dynamic survivable traffic grooming with effective load balancing in WDM all-optical mesh networks.
ICACCI
Abhishek Bandyopadhyay, Mohtasham Raghib, Uma Bhattacharya, Monish Chatterjee
2014 — conf
Improved algorithms for dynamic routing and wavelength assignment in WDM all-optical mesh networks.
WOCN
Abhishek Bandyopadhyay, Ajanta Sarkar, Uma Bhattacharya, Monish Chatterjee
2011 — conf
A 120dB-SNR 100dB-THD+N 21.5mW/channel multibit CT ΔΣ DAC.
ISSCC
Abhishek Bandyopadhyay, Michael Determan, Sejun Kim, Khiem Nguyen
2008 J jnl
A 108 dB SNR, 1.1 mW Oversampling Audio DAC With A Three-level DEM Technique.
IEEE J. Solid State Circuits
Khiem Nguyen, Abhishek Bandyopadhyay, Bob Adams, Karl Sweetland, Paul Baginski
2008 — conf
A 108dB SNR 1.1mW Oversampling Audio DAC with a Three-Level DEM Technique.
ISSCC
Khiem Nguyen, Abhishek Bandyopadhyay, Bob Adams, Karl Sweetland, Paul Baginski
2006 J jnl
Adaptive Algorithm Using Hot-Electron Injection for Programming Analog Computational Memory Elements Within 0.2% of Accuracy Over 3.5 Decades.
IEEE J. Solid State Circuits
Abhishek Bandyopadhyay, Guillermo J. Serrano, Paul E. Hasler
2006 J jnl
MATIA: a programmable 80 WμW/frame CMOS block matrix transform imager architecture.
IEEE J. Solid State Circuits
Abhishek Bandyopadhyay, Jungwon Lee, Ryan W. Robucci, Paul E. Hasler
2005 — conf
A 80µW/frame 104×128 CMOS imager front end for JPEG compression.
ISCAS (5)
Abhishek Bandyopadhyay, Jungwon Lee, Ryan W. Robucci, Paul E. Hasler
2005 — conf
Image processing system using a programmable transform imager.
ICASSP (5)
Jungwon Lee, Abhishek Bandyopadhyay, I. Faik Baskaya, Ryan W. Robucci, Paul E. Hasler
2005 — conf
Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method.
ISCAS (3)
Abhishek Bandyopadhyay, Guillermo J. Serrano, Paul E. Hasler
2004 — conf
A 531 nW/MHz, 128×32 current-mode programmable analog vector-matrix multiplier with over two decades of linearity.
CICC
Ravi Chawla, Abhishek Bandyopadhyay, Venkatesh Srinivasan, Paul E. Hasler
2004 — —
Matrix Transform Imager Architecture for On-Chip Low-Power Image Processing.
Abhishek Bandyopadhyay
2003 — conf
A fully programmable CMOS block matrix transform imager architecture.
CICC
Abhishek Bandyopadhyay, Paul E. Hasler
2003 J jnl
High Fill-Factor Imagers for Neuromorphic Processing Enabled by Floating-Gate Circuits.
EURASIP J. Adv. Signal Process.
Paul E. Hasler, Abhishek Bandyopadhyay, David V. Anderson
2002 — conf
A matrix transform imager allowing high-fill factor.
ISCAS (3)
Paul E. Hasler, Abhishek Bandyopadhyay, Paul D. Smith