| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2024 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2019 | Misc | conf |
VLSID
|
| 2018 | Misc | conf |
VLSID
|
| 2018 | Misc | conf |
VLSID
|
| 2017 | Misc | conf |
VLSID
|
| 2017 | Misc | conf |
Suppressing Single Transistor Latch Effect in Energy Efficient Steep Switching Junctionless MOSFETs.
VLSID
|
| 2015 | — | conf |
ESSDERC
|
| 2014 | Misc | conf |
Performance Optimization and Parameter Sensitivity Analysis of Ultra Low Power Junctionless MOSFETs.
VLSID
|
| 2014 | — | conf |
ISQED
|
| 2011 | J | jnl |
Microelectron. Reliab.
|
| 2010 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2009 | — | conf |
SoCC
|