Abderrahim Doumar

14 papers C 5Journal 1Unranked 8

Year	Rank	Type	Title / Venue / Authors
2011	C	`conf`	Fault Tolerance of Multiple Logic Faults in SRAM-Based FPGA Systems. DSD Farid Lahrach, Abderrahim Doumar, Eric Châtelet
2011	C	`conf`	Fault tolerance of SRAM-based FPGA via configuration frames. DDECS Farid Lahrach, Abderrahim Doumar, Eric Châtelet
2011	—	`conf`	Video acquisition between USB 2.0 CMOS camera and embedded FPGA system. ICSPCS Abderrazak Abdaoui, K. Gurram, M. Singh, A. Errandani, Eric Châtelet, Abderrahim Doumar, Tarek M. El-Fouly
2010	C	`conf`	A novel SRAM-based FPGA architecture for defect and fault tolerance of configurable logic blocks. DDECS Farid Lahrach, Abderrazek Abdaoui, Abderrahim Doumar, Eric Châtelet
2010	—	`conf`	Master-Slave TMR Inspired Technique for Fault Tolerance of SRAM-Based FPGA. ISVLSI Farid Lahrach, Abderrahim Doumar, Eric Châtelet, Abderrazek Abdaoui
2007	—	`conf`	Fault Tolerant SoC Architecture Design for JPEG2000 Using Partial Reconfigurability. DFT Abderrahim Doumar, Kentaroh Katoh, Hideo Ito
2005	C	`conf`	Design of On-Line Testing for SoC with IEEE P1500 Compliant Cores Using Reconfigurable Hardware and Scan Shift. IOLTS Kentaroh Katoh, Abderrahim Doumar, Hideo Ito
2003	J	`jnl`	Detecting, diagnosing, and tolerating faults in SRAM-based field programmable gate arrays: a survey. IEEE Trans. Very Large Scale Integr. Syst. Abderrahim Doumar, Hideo Ito
2000	—	`conf`	Design of Switching Blocks Tolerating Defects/Faults in FPGA Interconnection Resources. DFT Abderrahim Doumar, Hideo Ito
2000	—	`conf`	Testing approach within FPGA-based fault tolerant systems. Asian Test Symposium Abderrahim Doumar, Hideo Ito
1999	C	`conf`	An Automatic Testing and Diagnosis for FPGAs. PRDC Abderrahim Doumar, Hideo Ito
1999	—	`conf`	Defect and Fault Tolerance FPGAs by Shifting the Configuration Data. DFT Abderrahim Doumar, Satoshi Kaneko, Hideo Ito
1999	—	`conf`	Design of an automatic testing for FPGAs. ETW Abderrahim Doumar, Toshiaki Ohmameuda, Hideo Ito
1999	—	`conf`	Testing the Logic Cells and Interconnect Resources for FPGAs. Asian Test Symposium Abderrahim Doumar, Hideo Ito