Abdelkarim Mercha

43 papers A* 1A 1C 2Misc 1Journal 10Unranked 28

Year	Rank	Type	Title / Venue / Authors
2017	J	`jnl`	Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond. IEEE Trans. Very Large Scale Integr. Syst. Trong Huynh Bao, Julien Ryckaert, Zsolt Tokei, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq
2015	—	`conf`	A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS. A-SSCC Bertrand Parvais, Piet Wambacq, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Ken Sawada, Kazuki Nomoto, Tetsuya Oishi, Hiroaki Ammo
2015	—	`conf`	Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM. ICICDT Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq
2015	—	`conf`	Dimensioning for power and performance under 10nm: The limits of FinFETs scaling. ICICDT Marie Garcia Bardon, P. Schuddinck, Praveen Raghavan, Doyoung Jang, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
2015	—	`conf`	Holisitic device exploration for 7nm node. CICC Praveen Raghavan, Marie Garcia Bardon, Doyoung Jang, P. Schuddinck, Dmitry Yakimets, Julien Ryckaert, Abdelkarim Mercha, Naoto Horiguchi, Nadine Collaert, Anda Mocuta, Dan Mocuta, Zsolt Tokei, Diederik Verkest, Aaron Thean, An Steegen
2015	—	`conf`	Impact of device and interconnect process variability on clock distribution. ICICDT Nathalie Fievet, Praveen Raghavan, Rogier Baert, Frédéric Robert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
2015	—	`conf`	Impact of fin shape variability on device performance towards 10nm node. ICICDT Kazuyuki Tomida, Keizo Hiraga, Morin Dehan, Geert Hellings, Doyoung Jang, Kenichi Miyaguchi, Thomas Chiarella, Minsoo Kim, Anda Mocuta, Naoto Horiguchi, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
2015	—	`conf`	Lateral NWFET optimization for beyond 7nm nodes. ICICDT Dmitry Yakimets, Doyoung Jang, Praveen Raghavan, Geert Eneman, Hans Mertens, P. Schuddinck, Arindam Mallik, Marie Garcia Bardon, Nadine Collaert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Kristin De Meyer
2015	—	`conf`	Modeling FinFET metal gate stack resistance for 14nm node and beyond. ICICDT Kenichi Miyaguchi, Bertrand Parvais, Lars-Åke Ragnarsson, Piet Wambacq, Praveen Raghavan, Abdelkarim Mercha, Anda Mocuta, Diederik Verkest, Aaron Thean
2014	—	`conf`	Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies. ESSDERC Trong Huynh Bao, Dmitry Yakimets, Julien Ryckaert, Ivan Ciofi, Rogier Baert, Anabela Veloso, Jürgen Bömmels, Nadine Collaert, Philippe Roussel, S. Demuynck, Praveen Raghavan, Abdelkarim Mercha, Zsolt Tokei, Diederik Verkest, Aaron Thean, Piet Wambacq
2014	—	`conf`	Design Technology co-optimization for N10. CICC Julien Ryckaert, Praveen Raghavan, Rogier Baert, Marie Garcia Bardon, Mircea Dusa, Arindam Mallik, Sushil Sakhare, Boris Vandewalle, Piet Wambacq, Bharani Chava, Kris Croes, Morin Dehan, Doyoung Jang, Philippe Leray, Tsung-Te Liu, Kenichi Miyaguchi, Bertrand Parvais, Pieter Schuddinck, Philippe Weemaes, Abdelkarim Mercha, Jürgen Bömmels, Naoto Horiguchi, Greg McIntyre, Aaron Thean, Zsolt Tökei, Shaunee Cheng, Diederik Verkest, An Steegen
2013	—	`conf`	STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process. ESSDERC Doyoung Jang, Marie Garcia Bardon, Dmitry Yakimets, Kenichi Miyaguchi, An De Keersgieter, Thomas Chiarella, Romain Ritzenthaler, Morin Dehan, Abdelkarim Mercha
2013	A*	`conf`	TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes. DAC Arindam Mallik, Paul Zuber, Tsung-Te Liu, Bharani Chava, Bhavana Ballal, Pablo Royer Del Bario, Rogier Baert, Kris Croes, Julien Ryckaert, Mustafa Badaroglu, Abdelkarim Mercha, Diederik Verkest
2012	—	`conf`	3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps. ICICDT Wei Guo, Geert Van der Plas, Andrej Ivankovic, Geert Eneman, Vladimir Cherman, Bart De Wachter, Abdelkarim Mercha, Mario Gonzalez, Yann Civale, Augusto Redolfi, Thibault Buisson, A. Jourdan, Bart Vandevelde, Kenneth J. Rebibis, Ingrid De Wolf, Antonio La Manna, Gerald Beyer, Eric Beyne, Bart Swinnen
2011	A	`conf`	An analytical compact model for estimation of stress in multiple Through-Silicon Via configurations. DATE Geert Eneman, J. Cho, V. Moroz, Dragomir Milojevic, M. Choi, Kristin De Meyer, Abdelkarim Mercha, Eric Beyne, Thomas Hoffmann, Geert Van der Plas
2011	—	`conf`	Analysis of microbump induced stress effects in 3D stacked IC technologies. 3DIC Andrej Ivankovic, Geert Van der Plas, V. Moroz, M. Choi, Vladimir Cherman, Abdelkarim Mercha, Paul Marchal, Marcel Gonzalez, Geert Eneman, Wenqi Zhang, Thibault Buisson, Mikael Detalle, Antonio La Manna, Diederik Verkest, Gerald Beyer, Eric Beyne, Bart Vandevelde, Ingrid De Wolf, Dirk Vandepitte
2011	J	`jnl`	Design Issues and Considerations for Low-Cost 3-D TSV IC Technology. IEEE J. Solid State Circuits Geert Van der Plas, Paresh Limaye, Igor Loi, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Antonio Pullini, Federico Angiolini, Luca Benini, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal
2010	C	`conf`	3D integration: Circuit design, test, and reliability challenges. IOLTS Nikolaos Minas, Ingrid De Wolf, Erik Jan Marinissen, Michele Stucchi, Herman Oprins, Abdelkarim Mercha, Geert Van der Plas, Dimitrios Velenis, Pol Marchal
2010	C	`conf`	45-nm Planar bulk-CMOS 23-GHz LNAs with high-Q above-IC inductors. ISCAS Wen-Chieh Wang, Zue-Der Huang, Geert Carchon, Abdelkarim Mercha, Stefaan Decoutere, Walter De Raedt, Chung-Yu Wu
2010	—	`conf`	Design issues and considerations for low-cost 3D TSV IC technology. ISSCC Geert Van der Plas, Paresh Limaye, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Domae Shinichi, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Pol Marchal, Eric Beyne
2010	Misc	`conf`	Identifying the Bottlenecks to the RF Performance of FinFETs. VLSI Design Vaidyanathan Subramanian, Abdelkarim Mercha, Bertrand Parvais, Morin Dehan, Guido Groeseneken, Willy M. C. Sansen, Stefaan Decoutere
2010	—	`conf`	Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions. CICC Geert Van der Plas, Steven Thijs, Dimitri Linten, Guruprasad Katti, Paresh Limaye, Abdelkarim Mercha, Michele Stucchi, Herman Oprins, Bart Vandevelde, Nikolaos Minas, Miro Cupac, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal
2009	—	`conf`	3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV). 3DIC Jan Van Olmen, Jan Coenen, Wim Dehaene, Kristin De Meyer, Cedric Huyghebaert, Anne Jourdain, Guruprasad Katti, Abdelkarim Mercha, Michal Rakowski, Michele Stucchi, Youssef Travaly, Eric Beyne, Bart Swinnen
2009	—	`conf`	FinFET RF receiver building blocks operating above 10 GHz. ESSCIRC Domagoj Siprak, Piet Wambacq, Bertrand Parvais, Abdelkarim Mercha, Michael Fulde, Jesenka Veledar Kruger, Morin Dehan, Stefaan Decoutere
2009	—	`conf`	Low-cost feedback-enabled LNAs in 45nm CMOS. ESSCIRC Jonathan Borremans, Steven Thijs, Morin Dehan, Abdelkarim Mercha, Piet Wambacq
2009	—	`conf`	Migrating from planar to FinFET for further CMOS scaling: SOI or bulk? ESSCIRC Thomas Chiarella, Liesbeth Witters, Abdelkarim Mercha, Christoph Kerner, Rok Dittrich, Michal Rakowski, Claude Ortolland, Lars-Åke Ragnarsson, Bertrand Parvais, An De Keersgieter, Stefan Kubicek, Augusto Redolfi, R. Rooyackers, C. Vrancken, S. Brus, A. Lauwers, Philippe Absil, S. Biesemans, Thomas Y. Hoffmann
2008	—	`conf`	Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies. ISSCC Piet Wambacq, Abdelkarim Mercha, Karen Scheir, Bob Verbruggen, Jonathan Borremans, Vincent De Heyn, Steven Thijs, Dimitri Linten, Geert Van der Plas, Bertrand Parvais, Morin Dehan, Stefaan Decoutere, Charlotte Soens, Nadine Collaert, Malgorzata Jurczak
2007	—	`conf`	An Accurate Scalable Compact Model for the Substrate Resistance of RF MOSFETs. CICC Bertrand Parvais, S. Hu, Morin Dehan, Abdelkarim Mercha, Stefaan Decoutere
2007	—	`conf`	Analog design challenges and trade-offs using emerging materials and devices. ESSCIRC Michael Fulde, Abdelkarim Mercha, Cedric Gustin, Bertrand Parvais, Vaidyanathan Subramanian, Klaus von Arnim, Florian Bauer, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger
2007	—	`conf`	FinFET technology for analog and RF circuits. ICECS Bertrand Parvais, Vaidyanathan Subramanian, Abdelkarim Mercha, Morin Dehan, Piet Wambacq, Willy Sansen, Guido Groeseneken, Stefaan Decoutere
2007	J	`jnl`	High-temperature performance of state-of-the-art triple-gate transistors. Microelectron. Reliab. Kerem Akarvardar, Abdelkarim Mercha, Eddy Simoen, Vaidyanathan Subramanian, Cor Claeys, Pierre Gentil, Sorin Cristoloveanu
2007	J	`jnl`	The Potential of FinFETs for Analog and RF Circuit Applications. IEEE Trans. Circuits Syst. I Regul. Pap. Piet Wambacq, Bob Verbruggen, Karen Scheir, Jonathan Borremans, Morin Dehan, Dimitri Linten, Vincent De Heyn, Geert Van der Plas, Abdelkarim Mercha, Bertrand Parvais, Cedric Gustin, Vaidyanathan Subramanian, Nadine Collaert, Malgorzata Jurczak, Stefaan Decoutere
2006	J	`jnl`	Hot-carrier-induced degradation of drain current hysteresis and transients in thin gate oxide floating body partially depleted SOI nMOSFETs. Microelectron. Reliab. Joan Marc Rafí, Eddy Simoen, Kiyoteru Hayama, Abdelkarim Mercha, Francesca Campabadal, Hidenori Ohyama, Cor Claeys
2006	J	`jnl`	Impact on the back gate degradation in partially depleted SOI n-MOSFETs by 2-MeV electron irradiation. Microelectron. Reliab. Kiyoteru Hayama, Kenichiro Takakura, K. Shigaki, Hidenori Ohyama, Joan Marc Rafí, Abdelkarim Mercha, Eddy Simoen, Cor Claeys
2006	—	`conf`	Technologies for (sub-) 45nm Analog/RF CMOS - Circuit Design Opportunities and Challenges. CICC Stefaan Decoutere, Piet Wambacq, Vaidy Subramanian, Jonathan Borremans, Abdelkarim Mercha
2005	J	`jnl`	A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS. IEEE J. Solid State Circuits Dimitri Linten, Steven Thijs, Mahadeva Iyer Natarajan, Piet Wambacq, Wutthinan Jeamsaksiri, Javier Ramos, Abdelkarim Mercha, Snezana Jenei, Stéphane Donnay, Stefaan Decoutere
2005	—	`conf`	Low-power low-noise highly ESD robust LNA, and VCO design using above-IC inductors. CICC Dimitri Linten, Xiao Sun, Steven Thijs, M. I. Natarajan, Abdelkarim Mercha, Geert Carchon, Piet Wambacq, Takeshi Nakaie, Stefaan Decoutere
2005	J	`jnl`	Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors. IEEE J. Solid State Circuits Dimitri Linten, Xiao Sun, Geert Carchon, Wutthinan Jeamsaksiri, Abdelkarim Mercha, Javier Ramos, Snezana Jenei, Piet Wambacq, Morin Dehan, Lars Aspemyr, Andries J. Scholten, Stefaan Decoutere, Stéphane Donnay, Walter De Raedt
2005	J	`jnl`	Radiation source dependence of performance degradation in thin gate oxide fully-depleted SOI n-MOSFETs. Microelectron. Reliab. Kiyoteru Hayama, Kenichiro Takakura, Hidenori Ohyama, S. Kuboyama, S. Matsuda, Joan Marc Rafí, Abdelkarim Mercha, Eddy Simoen, Cor Claeys
2005	—	`conf`	Technology and architecture for deep submicron RF CMOS technology. SBCCI Abdelkarim Mercha
2004	—	`conf`	A 328 μW 5 GHz voltage-controlled oscillator in 90 nm CMOS with high-quality thin-film post-processed inductor. CICC Dimitri Linten, Xiao Sun, Geert Carchon, Wutthinan Jeamsaksiri, Abdelkarim Mercha, Javier Ramos, Snezana Jenei, Lars Aspemyr, Andries J. Scholten, Piet Wambacq, Stefaan Decoutere, Stéphane Donnay, Walter De Raedt
2004	—	`conf`	A 5 GHz fully integrated ESD-protected low-noise amplifier in 90 nm RF CMOS. ESSCIRC Dimitri Linten, Steven Thijs, Mahadeva Iyer Natarajan, Piet Wambacq, Wutthinan Jeamsaksiri, Javier Ramos, Abdelkarim Mercha, Snezana Jenei, Stéphane Donnay, Stefaan Decoutere
2004	J	`jnl`	Degradation of electrical performance and floating body effect in ultra thin gate oxide FD-SOI n-MOSFETs by 7.5-MeV proton irradiation. Microelectron. Reliab. Kiyoteru Hayama, Kenichiro Takakura, Hidenori Ohyama, Abdelkarim Mercha, Eddy Simoen, Cor Claeys, Joan Marc Rafí, Michael Kokkoris