Abbas Sheibanyrad

15 papers A* 1A 2C 1Journal 5Unranked 4

Year	Rank	Type	Title / Venue / Authors
2017	J	`jnl`	A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links. IEEE J. Solid State Circuits Pascal Vivet, Yvain Thonnart, Romain Lemaire, Cristiano Santos, Edith Beigné, Christian Bernard, Florian Darve, Didier Lattard, Ivan Miro Panades, Denis Dutoit, Fabien Clermidy, Séverine Cheramy, Abbas Sheibanyrad, Frédéric Pétrot, Eric Flamand, Jean Michailos, Alexandre Arriordaz, Lee Wang, Juergen Schloeffel
2017	C	`conf`	A Distributed NUCA Architecture Using an Efficient NoC Multicasting Support. DSD Hela Belhadj Amor, Abbas Sheibanyrad, Frédéric Pétrot
2014	J	`jnl`	Assignment of Vertical-Links to Routers in Vertically-Partially-Connected 3-D-NoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sahar Foroutan, Abbas Sheibanyrad, Frédéric Pétrot
2013	J	`jnl`	Elevator-First: A Deadlock-Free Distributed Routing Algorithm for Vertically Partially Connected 3D-NoCs. IEEE Trans. Computers Florentine Dubois, Abbas Sheibanyrad, Frédéric Pétrot, Maryam Bahmani
2012	—	`conf`	A 3D-NoC Router Implementation Exploiting Vertically-Partially-Connected Topologies. ISVLSI Maryam Bahmani, Abbas Sheibanyrad, Frédéric Pétrot, Florentine Dubois, Paolo Durante
2012	A*	`conf`	Cost-efficient buffer sizing in shared-memory 3D-MPSoCs using wide I/O interfaces. DAC Sahar Foroutan, Abbas Sheibanyrad, Frédéric Pétrot
2011	—	`book`	3D Integration for NoC-based SoC Architectures Abbas Sheibanyrad, Frédéric Pétrot, Axel Jantsch
2011	—	`ch.`	Asynchronous 3D-NoCs Making Use of Serialized Vertical Links. 3D Integration for NoC-based SoC Architectures Abbas Sheibanyrad, Frédéric Pétrot
2011	—	`conf`	Physical Implementation of an Asynchronous 3D-NoC Router Using Serial Vertical Links. ISVLSI Florian Darve, Abbas Sheibanyrad, Pascal Vivet, Frédéric Pétrot
2008	J	`jnl`	Multisynchronous and Fully Asynchronous NoCs for GALS Architectures. IEEE Des. Test Comput. Abbas Sheibanyrad, Alain Greiner, Ivan Miro Panades
2008	J	`jnl`	Two efficient synchronous <--> asynchronous converters well-suited for networks-on-chip in GALS architectures. Integr. Abbas Sheibanyrad, Alain Greiner
2007	A	`conf`	Hybrid-Timing FIFOs to Use on Networks-on-Chip in GALS Architectures. ESA Abbas Sheibanyrad, Alain Greiner
2007	A	`conf`	Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture. DATE Abbas Sheibanyrad, Ivan Miro Panades, Alain Greiner
2006	—	`conf`	A Low Cost Network-on-Chip with Guaranteed Service Well Suited to the GALS Approach. Nano-Net Ivan Miro Panades, Alain Greiner, Abbas Sheibanyrad
2006	—	`conf`	Two Efficient Synchronous Û Asynchronous Converters Well-Suited for Network on Chip in GALS Architectures. PATMOS Abbas Sheibanyrad, Alain Greiner